From 077674e19b5a7717855b837626e0653a79cca2e3 Mon Sep 17 00:00:00 2001 From: David Westgate Date: Fri, 11 Apr 2025 18:33:22 -0700 Subject: [PATCH] RX signal strength workingish --- README.md | 6 +++--- init_regs_value.py | 3 ++- receive.py | 38 ++++++++++++++++++++++++++++++++++---- 3 files changed, 39 insertions(+), 8 deletions(-) diff --git a/README.md b/README.md index 718fa7c..63ab42b 100644 --- a/README.md +++ b/README.md @@ -25,12 +25,12 @@ The implementation here uses CC2500 register values which intend to mimic my [Gi | CSN | CE0 (Chip Select) | Pin 24 | GPIO 8 | | SO | MISO | Pin 21 | GPIO 9 | -### Optional Pins +### Interrupt Pins | CC2500 Pin | Function | Raspberry Pi GPIO Pin | GPIO Number | |------------|-------------------------------------------|-------------------------------|-------------| -| GDO0 | Interrupt/Data Ready | Pin 12 | GPIO 18 | -| GDO2 | Additional Interrupt/Data Line | Pin 22 | GPIO 25 | +| GDO0 | Interrupt/Data Ready | Pin 11 | GPIO 17 | +| GDO2 | Additional Interrupt/Data Line | Pin 23 | GPIO 27 | ### Power Amplifier Pins (If Applicable) diff --git a/init_regs_value.py b/init_regs_value.py index 7ed3cf3..a6b0336 100644 --- a/init_regs_value.py +++ b/init_regs_value.py @@ -21,7 +21,8 @@ # Whitening = false init_regs_value = { "IOCFG0" : 0x06, # 6 - GDO0OUTPUT PIN CONFIGURATION - "PKTCTRL0": 0x05, # 5 - PACKET AUTOMATION CONTROL + "PKTCTRL0": 0b00000001,# 5 - PACKET AUTOMATION CONTROL + "PKTCTRL1": 0b00000100,# 4 - PACKET AUTOMATION CONTROL "FSCTRL1" : 0x12, # 18 - FREQUENCY SYNTHESIZER CONTROL "FREQ1" : 0x20, # 32 - FREQUENCY CONTROL WORD, MIDDLE BYTE "FREQ0" : 0x11, # 17 - FREQUENCY CONTROL WORD, LOW BYTE diff --git a/receive.py b/receive.py index e0e826c..f05b5fa 100644 --- a/receive.py +++ b/receive.py @@ -6,6 +6,33 @@ SIDLE = get_addr('SIDLE') SFRX = get_addr('SFRX') SRX = get_addr('SRX') RXFIFO = get_addr('RXFIFO') +RSSI = get_addr('RSSI') + +def print_packet(spi, packet_length): + for i in range(packet_length): + print(f", byte: {0}: 0x{1}", i, read_register(spi, RXFIFO)) + +#TODO +def save_packet(): + print() + + +def get_rssi_from_pkt(packet): + if len(packet) < 2: + raise ValueError("Packet too short to contain RSSI and status bytes.") + rssi_raw = packet[-2] # Second-to-last byte is RSSI + return rssi_raw + + +def get_rssi_from_reg(spi): + return read_register(spi, RSSI) + +def get_signal_strength_rssi_raw(rssi_raw): + if rssi_raw >= 128: + rssi_dec = rssi_raw - 256 + else: + rssi_dec = rssi_raw + return rssi_dec / 2.0 - 74 # According to CC2500 datasheet def flush_rx(spi): # Make sure that the radio is in IDLE state before flushing the FIFO @@ -21,21 +48,24 @@ def rx_data_rf(spi): strobe(spi, SRX) gdo2_state = False count = 0 + strength = 0 while(gdo2_state == False): gdo2_state = digital_read(GDO2_PIN) delay(1) count = count+1 if count > 1000: flush_rx(spi) - print("ERR NO DATA") + # print("ERR NO DATA") return while(gdo2_state == True): gdo2_state = digital_read(GDO2_PIN) delay(100) packet_length: int = read_register(spi, RXFIFO) - print("Packet Length {0}".format(packet_length)) - for i in range(packet_length): - print(f", byte: {0}: 0x{1}", i, read_register(spi, RXFIFO)) + # print("Packet Length {0}".format(packet_length)) + packet: list = [read_register(spi, RXFIFO) for _ in range(packet_length)] + rssi_raw = get_rssi_from_pkt(packet) + strength = get_signal_strength_rssi_raw(rssi_raw) + print("Length: {0} bytes\t Signal: {1} dBm".format(packet_length, strength) ) # Make sure that the radio is in IDLE state before flushing the FIFO # (Unless RXOFF_MODE has been changed, the radio should be in IDLE state at this point)