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framework of TX functionality

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This commit is contained in:
David Westgate 2025-04-11 17:29:50 -07:00
parent 242a41fb91
commit 7731cd7288
2 changed files with 24 additions and 21 deletions
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10
main.py
View File

@ -1,6 +1,7 @@
import spidev import spidev
from util import print_gdo_state, sleep, get_addr, dump_regs, debug, GDO0_PIN, GDO2_PIN from util import print_gdo_state, sleep, get_addr, dump_regs, debug, GDO0_PIN, GDO2_PIN
from receive import rx_data_rf from receive import rx_data_rf
from transmit import transmit_packet
from common import reset, setup_spi, setup_gpio, read_register, test_read_write_reg, init_cc_2500, write_reg, SRES, SNOP, MARCSTATE, VERSION from common import reset, setup_spi, setup_gpio, read_register, test_read_write_reg, init_cc_2500, write_reg, SRES, SNOP, MARCSTATE, VERSION
@ -11,8 +12,9 @@ def menu():
print("2: Write reg hex value by name") print("2: Write reg hex value by name")
print("3: Dump registers") print("3: Dump registers")
print("4: rx_data_rf") print("4: rx_data_rf")
print("5: Run Read+Write test") print("5: transmit_packet")
print("6: Print GDO state") print("6: Run Read+Write test")
print("7: Print GDO state")
print("0: Quit") print("0: Quit")
@ -52,9 +54,11 @@ if __name__ == "__main__":
while(True): while(True):
rx_data_rf(spi) rx_data_rf(spi)
elif cmd == 5: elif cmd == 5:
transmit_packet(spi)
elif cmd == 6:
res = test_read_write_reg(spi, True) res = test_read_write_reg(spi, True)
print("Test result : "+str(res)) print("Test result : "+str(res))
elif cmd == 6: elif cmd == 7:
print_gdo_state(GDO0_PIN, GDO2_PIN) print_gdo_state(GDO0_PIN, GDO2_PIN)
else: else:
print("Invalid command") print("Invalid command")

35
transmit.py
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@ -1,22 +1,21 @@
from . import strobe, get_addr from common import strobe, write_burst
from util import get_addr
def burst_write(spi, addr, data):
"""Write multiple bytes to FIFO or registers"""
BURST = get_addr("BURST")
spi.xfer2([addr | BURST] + data)
def send_packet(data): SIDLE = get_addr('SIDLE')
# Flush TX FIFO SFTX = get_addr('SFTX')
SFTX = get_addr("SFTX") STX = get_addr('STX')
strobe(SFTX) WRITE_BURST = get_addr("WRITE_BURST")
TXFIFO_BURST = 0x7F
# Load data to TX FIFO (fixed length) def transmit_packet(spi):
TXFIFO = get_addr("TXFIFO") strobe(spi, SIDLE)
burst_write(TXFIFO, data) # 0x3F = TX FIFO strobe(spi, SFTX)
data = [0] * 5
data[0] = 5
data[1] = 1
data[2] = 2
data[3] = 3
data[4] = 4
write_burst(spi, TXFIFO_BURST, data)
# Strobe STX to transmit
STX = get_addr("STX")
strobe(STX) # STX
print(f"Sent: {data}")