diff --git a/main.py b/main.py index b9bf78c..3d43617 100644 --- a/main.py +++ b/main.py @@ -1,11 +1,6 @@ import spidev -import sys -import select -import time - -from init_regs_value import init_regs_value -from regs_addr import regs_addr from util import * +from receive import receive_packet debug = True def menu(): @@ -13,18 +8,19 @@ def menu(): print("1: Read Reg by name") print("2: Write reg hex value by name") print("3: Dump registers") + print("4: Poll for packets") print("0: Quit") if __name__ == "__main__": spi = spidev.SpiDev() spi.open(0, 0) # Bus 0, CE0 (Pin 24) - spi.max_speed_hz = 2000000 # Safe start speed + spi.max_speed_hz = 500000 # Safe start speed spi.mode = 0b00 # SPI mode 0 stop = False print("Sending SRES (reset)...") spi.xfer2([SRES]) - time.sleep(0.1) + sleep(0.1) print("Sending SNOP (no-op)...") status = spi.xfer2([SNOP])[0] @@ -35,7 +31,7 @@ if __name__ == "__main__": print(f"CC2500 VERSION register: 0x{version:02X}") init_regs(spi) - time.sleep(0.1) + sleep(0.1) test_read_write_reg(spi) @@ -57,11 +53,15 @@ if __name__ == "__main__": addr = get_addr(reg_name) value = int(input("New Register value (hex): "),16) write_reg(spi, addr, value) - time.sleep(0.1) + sleep(0.1) value_check = read_register(spi,addr) print("Updated Value: " + hex(value) +" == " + str(value)) elif cmd == 3: dump_regs(spi) + elif cmd == 4: + while True: + receive_packet(spi) + sleep(0.2) else: print("Invalid command") finally: diff --git a/receive.py b/receive.py index 958070e..ddc732d 100644 --- a/receive.py +++ b/receive.py @@ -1,40 +1,43 @@ -def burst_read(addr, length): +from util import * +import time + +def burst_read(spi, addr, length): """Read multiple bytes""" - READ_SINGLE = ACCESS["READ_SINGLE"]["dec"] - READ_BURST = ACCESS["READ_BURST"]["dec"] + READ_SINGLE = get_addr["READ_SINGLE"] + READ_BURST = get_addr["READ_BURST"] return spi.xfer2([addr | READ_SINGLE | READ_BURST] + [0x00] * length) -def read_fifo(): +def read_fifo(spi): # Burst read RX FIFO - READ_BURST = ACCESS["READ_BURST"]["dec"] - RXFIFO = MEMORY["RXFIFI"]["dec"] + READ_BURST = get_addr("READ_BURST") + RXFIFO = get_addr("RXFIFO") fifo = spi.xfer2([RXFIFO | READ_BURST] + [0x00]*64) # Max 64 bytes return fifo[1:] -def receive_packet(): +def receive_packet(spi): # Flush RX FIFO - SFRX = STROBES["SFRX"]["dec"] - strobe(SFRX) # SFRX + SFRX = get_addr("SFRX") + strobe(spi, SFRX) # SFRX - SRX = STROBES["SRX"]["dec"] + SRX = get_addr( "SRX") # Go into RX mode - strobe(SRX) # SRX + strobe(spi, SRX) # SRX # Wait for data (use GDO0 in real app) time.sleep(0.5) # Check RXBYTES - RXBYTES = STATUS["RXBYTES"]["dec"] - rx_bytes = read_register(RXBYTES) & 0x7F + RXBYTES = get_addr( "RXBYTES") + rx_bytes = read_register(spi, RXBYTES) & 0x7F if rx_bytes == 0: print("No data received.") return None # Read data - RXFIFO = MEMORY["RXFIFO"]["dec"] - data = read_fifo() # 0x3F = RX FIFO + # RXFIFO = get_addr("RXFIFO") + data = read_fifo(spi) # 0x3F = RX FIFO print(f"Received: {data}") return data diff --git a/util.py b/util.py index 1900e27..f4e5ea6 100644 --- a/util.py +++ b/util.py @@ -1,5 +1,6 @@ from init_regs_value import init_regs_value from regs_addr import regs_addr +import time CONFIG_REGS = regs_addr["CONFIG_REGS"] STROBES = regs_addr["STROBES"] STATUS = regs_addr["STATUS"] @@ -63,4 +64,7 @@ def dump_regs(spi): for reg_name, reg_addr in reg_data.items(): name :str = reg_name value = read_register(spi, reg_addr) - print((name+":").ljust(15) +hex(value).ljust(4)+"\t"+str(value)) \ No newline at end of file + print((name+":").ljust(15) +hex(value).ljust(4)+"\t"+str(value)) + +def sleep(t): + return time.sleep(t) \ No newline at end of file