dev #1
@ -1,4 +1,4 @@
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import spidev
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from spidev import SpiDev
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import RPi.GPIO as GPIO
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import RPi.GPIO as GPIO
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from .util import sleep, get_addr
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from .util import sleep, get_addr
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from .init_regs_value import init_regs_value
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from .init_regs_value import init_regs_value
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@ -15,26 +15,26 @@ VERSION = STATUS["VERSION"]
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MARCSTATE = STATUS["MARCSTATE"]
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MARCSTATE = STATUS["MARCSTATE"]
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def write_reg(spi, addr, value):
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def write_reg(spi: SpiDev, addr: int, value: int):
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"""Write single byte to a register"""
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"""Write single byte to a register"""
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spi.xfer2([addr, value])
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spi.xfer2([addr, value])
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sleep(0.1)
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sleep(0.1)
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def read_register(spi, addr):
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def read_register(spi: SpiDev, addr: int):
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READ_SINGLE = get_addr("READ_SINGLE")
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READ_SINGLE = get_addr("READ_SINGLE")
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# Send address | 0x80 (read), then 0x00 dummy to clock in response
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# Send address | 0x80 (read), then 0x00 dummy to clock in response
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response = spi.xfer2([READ_SINGLE | addr, 0x00])
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response = spi.xfer2([READ_SINGLE | addr, 0x00])
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# sleep(0.1)
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# sleep(0.1)
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return response[1]
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return response[1]
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def write_burst(spi, addr, data):
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def write_burst(spi: SpiDev, addr: int, data):
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"""Write multiple bytes using burst write"""
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"""Write multiple bytes using burst write"""
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WRITE_BURST = get_addr("WRITE_BURST")
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WRITE_BURST = get_addr("WRITE_BURST")
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tbuf = [addr | WRITE_BURST] + data
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tbuf = [addr | WRITE_BURST] + data
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spi.xfer2(tbuf)
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spi.xfer2(tbuf)
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sleep(0.1)
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sleep(0.1)
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def read_burst(spi, addr, length):
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def read_burst(spi: SpiDev, addr: int, length):
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"""Read multiple bytes using burst read"""
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"""Read multiple bytes using burst read"""
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READ_BURST = get_addr("READ_BURST")
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READ_BURST = get_addr("READ_BURST")
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rbuf = [addr | READ_BURST] + [0x00] * length
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rbuf = [addr | READ_BURST] + [0x00] * length
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@ -42,18 +42,18 @@ def read_burst(spi, addr, length):
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sleep(0.1)
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sleep(0.1)
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return response[1:] # Skip status byte
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return response[1:] # Skip status byte
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def strobe(spi, command):
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def strobe(spi: SpiDev, command: int):
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"""Send a command strobe to CC2500"""
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"""Send a command strobe to CC2500"""
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spi.xfer2([command])
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spi.xfer2([command])
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sleep(0.1)
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sleep(0.1)
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def init_cc_2500(spi):
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def init_cc_2500(spi: SpiDev):
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for reg_name, value in init_regs_value.items():
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for reg_name, value in init_regs_value.items():
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addr = get_addr(reg_name)
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addr = get_addr(reg_name)
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write_reg(spi, addr, value)
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write_reg(spi, addr, value)
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def setup_spi():
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def setup_spi():
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spi = spidev.SpiDev()
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spi = SpiDev()
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spi.open(0, 0) # Bus 0, CE0 (Pin 24)
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spi.open(0, 0) # Bus 0, CE0 (Pin 24)
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spi.max_speed_hz = 100_000 # Safe start speed
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spi.max_speed_hz = 100_000 # Safe start speed
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spi.mode = 0b00 # SPI mode 0
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spi.mode = 0b00 # SPI mode 0
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@ -66,7 +66,7 @@ def setup_gpio(GDO0_PIN=17, GDO2_PIN=27):
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GPIO.setup(GDO2_PIN, GPIO.IN, pull_up_down=GPIO.PUD_DOWN)
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GPIO.setup(GDO2_PIN, GPIO.IN, pull_up_down=GPIO.PUD_DOWN)
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sleep(0.1)
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sleep(0.1)
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def reset(spi):
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def reset(spi: SpiDev):
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# print("Sending SRES (reset)...")
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# print("Sending SRES (reset)...")
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spi.xfer2([SRES])
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spi.xfer2([SRES])
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sleep(0.5)
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sleep(0.5)
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@ -86,7 +86,7 @@ def reset(spi):
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# raise Exception("Expected Version was 0x2F!! Quitting")
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# raise Exception("Expected Version was 0x2F!! Quitting")
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def test_read_write_reg(spi, dbg=False):
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def test_read_write_reg(spi: SpiDev, dbg=False):
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FIFOTHR = get_addr("FIFOTHR")
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FIFOTHR = get_addr("FIFOTHR")
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initial_val = read_register(spi, FIFOTHR)
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initial_val = read_register(spi, FIFOTHR)
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test_value = initial_val + 1
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test_value = initial_val + 1
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@ -1,5 +1,7 @@
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from datetime import datetime
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from datetime import datetime
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from pathlib import Path
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from pathlib import Path
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from spidev import SpiDev
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from .util import sleep, get_addr, digital_read, GDO0_PIN, GDO2_PIN, debug, delay
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from .util import sleep, get_addr, digital_read, GDO0_PIN, GDO2_PIN, debug, delay
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import time
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import time
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from .common import strobe, read_register
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from .common import strobe, read_register
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@ -10,12 +12,12 @@ SRX = get_addr('SRX')
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RXFIFO = get_addr('RXFIFO')
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RXFIFO = get_addr('RXFIFO')
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RSSI = get_addr('RSSI')
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RSSI = get_addr('RSSI')
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def print_packet(spi, packet_length):
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def print_packet(spi: SpiDev, packet_length):
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for i in range(packet_length):
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for i in range(packet_length):
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print(f", byte: {0}: 0x{1}", i, read_register(spi, RXFIFO))
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print(f", byte: {0}: 0x{1}", i, read_register(spi, RXFIFO))
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# Save packet to a timestamped binary file
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# Save packet to a timestamped binary file
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def save_packet(packet: list):
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def save_packet(packet: list[int]):
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# Create directory to store packets if it doesn't exist
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# Create directory to store packets if it doesn't exist
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packet_dir = Path("saved_packets")
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packet_dir = Path("saved_packets")
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packet_dir.mkdir(parents=True, exist_ok=True)
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packet_dir.mkdir(parents=True, exist_ok=True)
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@ -31,14 +33,14 @@ def save_packet(packet: list):
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print(f"Packet saved to {filename}")
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print(f"Packet saved to {filename}")
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def get_rssi_from_pkt(packet):
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def get_rssi_from_pkt(packet: list[int]):
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if len(packet) < 2:
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if len(packet) < 2:
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raise ValueError("Packet too short to contain RSSI and status bytes.")
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raise ValueError("Packet too short to contain RSSI and status bytes.")
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rssi_raw = packet[-2] # Second-to-last byte is RSSI
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rssi_raw = packet[-2] # Second-to-last byte is RSSI
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return rssi_raw
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return rssi_raw
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def get_rssi_from_reg(spi):
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def get_rssi_from_reg(spi: SpiDev):
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return read_register(spi, RSSI)
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return read_register(spi, RSSI)
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def get_signal_strength_rssi_raw(rssi_raw):
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def get_signal_strength_rssi_raw(rssi_raw):
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@ -48,7 +50,7 @@ def get_signal_strength_rssi_raw(rssi_raw):
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rssi_dec = rssi_raw
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rssi_dec = rssi_raw
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return rssi_dec / 2.0 - 74 # According to CC2500 datasheet
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return rssi_dec / 2.0 - 74 # According to CC2500 datasheet
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def flush_rx(spi):
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def flush_rx(spi: SpiDev):
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# Make sure that the radio is in IDLE state before flushing the FIFO
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# Make sure that the radio is in IDLE state before flushing the FIFO
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# (Unless RXOFF_MODE has been changed, the radio should be in IDLE state at this point)
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# (Unless RXOFF_MODE has been changed, the radio should be in IDLE state at this point)
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delay(10)
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delay(10)
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@ -58,7 +60,7 @@ def flush_rx(spi):
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strobe(spi, SFRX)
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strobe(spi, SFRX)
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delay(10)
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delay(10)
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def rx_data_rf(spi):
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def rx_data_rf(spi: SpiDev):
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strobe(spi, SRX)
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strobe(spi, SRX)
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gdo2_state = False
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gdo2_state = False
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count = 0
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count = 0
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@ -75,7 +77,7 @@ def rx_data_rf(spi):
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gdo2_state = digital_read(GDO2_PIN)
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gdo2_state = digital_read(GDO2_PIN)
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delay(100)
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delay(100)
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packet_length: int = read_register(spi, RXFIFO)
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packet_length: int = read_register(spi, RXFIFO)
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packet: list = [read_register(spi, RXFIFO) for _ in range(packet_length)]
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packet: list[int] = [read_register(spi, RXFIFO) for _ in range(packet_length)]
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rssi_raw = get_rssi_from_pkt(packet)
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rssi_raw = get_rssi_from_pkt(packet)
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strength = get_signal_strength_rssi_raw(rssi_raw)
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strength = get_signal_strength_rssi_raw(rssi_raw)
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print("Length: {0} bytes\t Signal: {1} dBm".format(packet_length, strength) )
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print("Length: {0} bytes\t Signal: {1} dBm".format(packet_length, strength) )
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11
src/util.py
11
src/util.py
@ -1,3 +1,4 @@
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from spidev import SpiDev
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from .regs_addr import regs_addr
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from .regs_addr import regs_addr
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import RPi.GPIO as GPIO
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import RPi.GPIO as GPIO
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import time
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import time
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@ -5,7 +6,7 @@ debug = True
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GDO0_PIN=17
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GDO0_PIN=17
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GDO2_PIN=27
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GDO2_PIN=27
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def rr(spi, addr):
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def rr(spi: SpiDev, addr):
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READ_SINGLE = get_addr("READ_SINGLE")
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READ_SINGLE = get_addr("READ_SINGLE")
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# Send address | 0x80 (read), then 0x00 dummy to clock in response
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# Send address | 0x80 (read), then 0x00 dummy to clock in response
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response = spi.xfer2([READ_SINGLE | addr, 0x00])
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response = spi.xfer2([READ_SINGLE | addr, 0x00])
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@ -21,19 +22,19 @@ def print_gdo_state(GDO0_PIN=17, GDO2_PIN=27):
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def digital_read(GDO_PIN: int):
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def digital_read(GDO_PIN: int):
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return GPIO.input(GDO_PIN)
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return GPIO.input(GDO_PIN)
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def get_addr(name):
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def get_addr(name: str):
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addr = ""
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addr = 0x00
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stop = False
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stop = False
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for reg_type, reg_data in regs_addr.items():
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for reg_type, reg_data in regs_addr.items():
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for reg_name, reg_addr in reg_data.items():
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for reg_name, reg_addr in reg_data.items():
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if reg_name == name:
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if reg_name == name:
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stop = True
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stop = True
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addr = reg_addr
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addr = int(reg_addr)
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if stop == False:
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if stop == False:
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raise Exception("Failed to find address for "+name)
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raise Exception("Failed to find address for "+name)
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return addr
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return addr
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def dump_regs(spi, cfgonly = False):
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def dump_regs(spi: SpiDev, cfgonly = False):
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if cfgonly:
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if cfgonly:
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for reg_name, reg_addr in regs_addr["CONFIG_REGS"].items():
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for reg_name, reg_addr in regs_addr["CONFIG_REGS"].items():
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name :str = reg_name
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name :str = reg_name
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0
tx_packets/activate.bin
Normal file
0
tx_packets/activate.bin
Normal file
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Block a user