restructure to fix Pylance

.vscode/settings.json

@@ -0,0 +1,3 @@
+{
+ 
+}

src/common.py

@@ -1,8 +1,8 @@
 import spidev
 import RPi.GPIO as GPIO
-from util import sleep, get_addr
-from init_regs_value import init_regs_value
-from regs_addr import regs_addr
+from .util import sleep, get_addr
+from .init_regs_value import init_regs_value
+from .regs_addr import regs_addr
 CONFIG_REGS = regs_addr["CONFIG_REGS"]
 STROBES = regs_addr["STROBES"]
 STATUS = regs_addr["STATUS"]

src/main.py

@@ -1,8 +1,8 @@
 import spidev
-from util import print_gdo_state, sleep, get_addr, dump_regs, debug, GDO0_PIN, GDO2_PIN
-from receive import rx_data_rf
-from transmit import transmit_packet
-from common import reset, setup_spi, setup_gpio, read_register, test_read_write_reg, init_cc_2500, write_reg, SRES, SNOP, MARCSTATE, VERSION
+from .util import print_gdo_state, sleep, get_addr, dump_regs, debug, GDO0_PIN, GDO2_PIN
+from .receive import rx_data_rf
+from .transmit import transmit_packet
+from .common import reset, setup_spi, setup_gpio, read_register, test_read_write_reg, init_cc_2500, write_reg, SRES, SNOP, MARCSTATE, VERSION
 
 
 

src/receive.py

@@ -1,6 +1,6 @@
-from util import sleep, get_addr, digital_read, GDO0_PIN, GDO2_PIN, debug, delay
+from .util import sleep, get_addr, digital_read, GDO0_PIN, GDO2_PIN, debug, delay
 import time
-from common import strobe, read_register
+from .common import strobe, read_register
 
 SIDLE = get_addr('SIDLE')
 SFRX = get_addr('SFRX')

src/transmit.py

@@ -1,5 +1,5 @@
-from common import strobe, write_burst
-from util import get_addr
+from .common import strobe, write_burst
+from .util import get_addr
 
 
 SIDLE = get_addr('SIDLE')

src/util.py

@@ -1,4 +1,4 @@
-from regs_addr import regs_addr
+from .regs_addr import regs_addr
 import RPi.GPIO as GPIO
 import time
 debug = True